IdeaWell

Project ideas from Hacker News discussions.

Write up of my homebrew CPU build

Original Article

Hacker News Discussion

📝 Discussion Summary (Click to expand)

1. Keep CPU designin the simulated world
Many builders warn that moving from Logisim/Verilog to physical chips introduces tedious, invisible problems (timing glitches, bad wiring, etc.) that drain the fun out of design.

"I always applaud homebrew cpu designs but after doing so many myself I would reaaaaly advice to stay away from dip chips/breadboards/wirewraps and any attempts to put it into real physical world. ... these are not challenges, just mundane dull work." – artemonster

2. How early computers were actually programmed
The discussion reflects on manual methods—plugboards, toggle switches, punch cards, and mask‑programmed ROMs—showing that “programming” once meant rewiring hardware or entering code by hand. > "Plugboards! Think telephone exchange but used as a ROM." – jacquesm

"Actual application code was hardwired, entered manually with switches and lights, or with punch cards... Later, when ICs were sufficiently advanced, mask‑programmed ROMs/PLAs." – moring

3. Community enthusiasm & practical implementation tips
Homebrew CPU projects are celebrated, and contributors share concrete hardware tricks (e.g., simple microcode memory, chip‑level signal routing).

"CPU's microcode can be surprisingly simple: ... The microcode can be just a memory where the input signals are the memory address and the output is the control signals." – mrgaro
"To get both blinkenlights for registers and tri‑state for bus driving, use two ’574 chips in parallel rather than a ’377 behind a ’245." – p_nuts

🚀 Project Ideas

Generating project ideas…

ChipBridge#Summary

  • Turn Logisim/Verilog CPU designs into ready‑to‑order PCB and fab files with a single click.
  • Eliminates manual breadboarding and hidden timing problems.
  • Core value: bridges simulation fun to physical hardware.

Details| Key | Value |

|-----|-------| | Target Audience | Hobbyist CPU builders, educators, retro‑computing enthusiasts | | Core Feature | One‑click generation of Gerbers, BOM, and optional MPW order integration | | Tech Stack | React front‑end, Python backend using KiCad APIs, cloud MPW services (SkyWater/Europractice) | | Difficulty | Medium | | Monetization | Revenue-ready: {subscription $9/mo} |

Notes

  • Directly solves the “stay in the sim” frustration voiced by Hacker News commenters who dread breadboard wiring and invisible glitches. - Likely to spark discussion about community‑run MPW runs and open‑source silicon.

TimingGuard

Summary

  • Visualizes timing violations, glitches, and signal integrity issues in breadboard CPU builds.
  • Provides instant warnings and wiring suggestions to keep the build reliable.
  • Core value: makes physical debugging as engaging as simulation.

Details

Key Value
Target Audience DIY discrete‑logic CPU builders, FPGA hobbyists, educators
Core Feature Live waveform analysis linked to schematic, auto‑suggested net rewiring
Tech Stack Electron/React UI, Python backend, integration with Saleae Logic and cheap USB‑logic analyzers
Difficulty Medium
Monetization Revenue-ready: {tiered license $15/mo}

Notes

  • Addresses the “invisible issues like timing, glitchy half‑dead chip” complaint from multiple HN comments.
  • Could generate discussion about tooling gaps in the homebrew CPU community.

TapeoutHub

Summary

  • Marketplace where hobbyists upload small CPU netlists and receive low‑cost MPW fabricated chips.
  • Handles ordering, payment, and shipping of fabricated dies, removing the silicon entry barrier.
  • Core value: lets enthusiasts finally see their designs work in silicon.

Details

Key Value
Target Audience Retro‑computing DIYers, open‑source hardware contributors, students
Core Feature Upload Verilog/VHDL, auto‑generate GDSII, select foundry, pay per project, receive chips by mail
Tech Stack Django + Celery backend, Google Colab synthesis pipeline, partnership with SkyWater MPW service
Difficulty High
Monetization Revenue-ready: {pay‑per‑fab fee 5% + $30 handling}

Notes

  • Directly answers the “how did they program the first CPUs?” and “chicken/egg” curiosity in the thread.
  • Expected to attract strong community interest and debate about accessible silicon fabrication.

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